Vue fiche unique

Title: AME: Analog Microelectronics
Short Code: MTE7907
ECTS Credits: 2
UAS: BFH
Organizer Details: BFH HuCE
Evaluation:

Final exam 2 weeks after the last course session. The lecture will provide additional information at the beginning of the course.

Decision Date: 21 mars 2023 
Start Date: 21 avril 2023 
End Date: 2 juin 2023 
Date Details:

SW Date CW Morning (4L) Afternoon (4L)
8 21.04.2023 16 AME AME
9 28.04.2023 17 AME AME
10 05.05.2023 18 AME AME
11 12.05.2023 19 AME AME
12 19.05.2023 20 Self-study
13 26.05.2023 21 Self-study
14 02.06.2023 22 Self-study Exam AME

Type:

Full day course at 6 Fridays per semester + 2.5 days individual preparation for the exam.

Language(s):

English by default, but deviations according to the wishes of the students.

Description (max. 300 characters):

This course is part of the HuCE EVA course series. The course topic is analogue micro electronic design. 

Contents and Learning Objectives:

Δ is the session’s duration in minutes.

Day 1st Session Δ 2nd Session Δ 3rd Session Δ 4th Session Δ
1 Lecture № 1 90 Hands-On-Training № 1 90 Lecture № 2 90 Hands-On-Training № 2 90
2 Lecture № 3 135 Exercises’ Session № 1 45 Lecture № 4 135 Exercises’ Session № 2 45
3 Lecture № 5 90 Hands-On-Training № 3 90 Lecture № 6 90 Hands-On-Training № 4 90
4 Lecture № 7 135 Exercises’ Session № 3 45 Lecture № 4 135 Exercises’ Session № 2 45
5 Written Exam 60 - - - - -

Lecture № 1: Introduction to Semiconductor-Physics

Topics:

  • Band-structure of monocristalline semiconductors
  • The electrochemical potential (Fermi-level)
  • Mobile charges (electrons and holes) and their densities
  • Generation, recombination
  • charge-conservation
  • Diffusion and drift
  • Poisson’s equation

Duration: 90 min

Lecture № 2: Manufacturing of integrated Circuits

Topics:

  • Manufacturing of ingots and wafers
  • Structured doping by diffusion or ion-implantation
  • Layer-deposition
    • by physical vapour-deposition,
    • by chemical vapour-deposition,
    • by sputtering
  • Photolithographic structuring of layers
  • Dicing
  • Wire- and ball-bonding
  • Lead-frame-, chip-size and multi-chip-module-packages

Duration: 90 min

Lecture № 3: Physics and Models of integrated Devices

Topics:

  • Polysilicon-resistor
  • Metal-capacitors with dedicated dielectric layers
  • Comb-metal-capacitors
  • Coil-inductors and transformers
  • Junction-diodes
  • Structure of the bipolar junction-transistor
  • Short-base-effect of the bipolar-junction-transistor
  • Electric model of the bipolar-junction-transistor

Duration: 135 min

Lecture № 4: Physics and Models of the MOSFET

Topics:

  • MOS-structure
  • Accumulation, weak and strong inversion
  • Charge and current in the channel for weak, moderate and strong inversion
  • Capacitances in weak, moderate and strong inversion
  • EKV-model for large signals
  • EKV-model for small signals
  • EKV-model in VerilogA and Modelica

Duration: 135 min

Lecture № 5: Basic matched MOSFET-Circuits

Topics:

  • Current-mirrors
  • Differential pairs
  • PTAT-loop
  • Translinear circuits

Duration: 90 min

Lecture № 6: MOSFET-Amplifiers and Voltage-Regulators

Topics:

  • Common-source-, -gate- and -drain-configurations
  • Examples of transconductance-amplifiers
  • Cascoding
  • Examples of operational amplifiers

Duration: 90 min

Lecture № 7: MOSFET-Regulators, -Voltage- and -Frequency-References, Switching

Topics:

  • Example of a low-drop-out-regulator
  • Example of a source-follower-regulator
  • Examples of continuous-time-bandgap-voltage-references
  • Examples of relaxation-oscillators
  • Examples of quartz-oscillators
  • MOSFETs as switches

Duration: 135 min

Lecture № 8: Switched-Capacitor-Circuits

Topics:

  • Example of a switched-capacitor-amplifier with
    • Operation
    • Limitations (gain, bandwidth, charge-injection)
    • Spectrum of sampled signal
    • Noise
  • Example of switched-capacitor-comparator
  • Example of switched-capacitor-filters
  • Example of reference with switched offset-compensation
  • Example of switched-capacitor-reference

Duration: 135 min

Exercise-Session № 1: Exercises on integrated Devices

Topics:

  • Exercises on passive integrated devices
  • Exercises on integrated diodes
  • Exercises on integrated bipolar junction-transistors

Duration: 45 min

Exercise-Session № 2: Exercises on integrated MOSFETs

Topics:

  • Exercises on MOSFETs’ operating-point and small-signal-parameters
  • Exercises on MOSFETs’ matching
  • Exercises on MOSFETs’ noise

Duration: 45 min

Exercise-Session № 3: Exercises on integrated Continuous-Time-Circuits

Topics:

  • Exercises on MOSFET-amplifiers (gain, bandwidth, noise)
  • Exercises on voltage-references (temperature-drift, noise)
  • Exercises on relaxation-oscillators (oscillation-frequency, frequency-error)

Duration: 45 min

Exercise-Session № 4: Exercises on integrated Sampled-Time-Circuits

Topics:

  • Exercises on switched-capacitor-filters (transfer-function, noise)
  • Exercises on switched voltage-references (mismatch-compensation, noise, disturbance-rejection)

Duration: 45 min

Hands-On-Training № 1: CAD-Basics and Schematic-Entry

Topics:

  • Putting CAD-system into operation
  • Schematic-entry

Duration: 90 min

Hands-On-Training № 2: Layout-Rules, -Entry and -Tests

Topics:

  • Device-matching-rules
  • Layout-entry
  • DRC
  • LVS

Duration: 90 min

Hands-On-Training № 3: Basic Verification

Topics:

  • Schematic-verification by simulation over operating-conditions and process-corners of
    • operating-point,
    • AC-behaviour and noise,
    • transient behaviour

Duration: 90 min

Hands-On-Training № 4: Advanced Verification

Topics:

  • Post-layout-verification consisting of
    • extraction of layout-parasitics and
    • simulation of operating-point, AC-behaviour, noise and transient behaviour of circuit including layout-parasitics
  • Advanced verification by
    • Monte-Carlo-simulation over device-mismatch and parameter-tolerances,
    • simulation of periodic steady-state and
    • simulation of transient noise

Duration: 90 min

Admission: Write an E-Mail to : mse@bfh.ch with CC to EVA contact person. Students who are not enrolled at BFH must first register with IS-A: https://is-a.bfh.ch/imoniteur_OPROAD/!formInscrs.connection?ww_c_formulaire=FORMULAIRE_ERASMUS
Literature:
Conditions:

50% theory and 50% labs

Contact:

Prof. Michel Moser

 
Contact Person E-Mail: michel.moser@bfh.ch
Status: registration open
 
Specialization: Industrial Technologies (InT)

Information and Communication Technologies (ICT)

Computer Science (CS)

Electrical Engineering (ElE)

Mechatronics & Automation (MA)

Medical Engineering (Med)

 

[Responsible for this text: Moser Michel Wenzel]